The present application is generally directed to nanoscale computing and memory circuits, and, more particularly, to the formation of wires for device applications, specifically, to the fabrication of electrodes employed in such devices. By xe2x80x9cnanoscalexe2x80x9d is meant that either the horizontal or vertical dimensions or the electrical pathway between electrodes is measured in nanometers.
With the constantly decreasing feature sizes of integrated-circuit devices, well-behaved devices are becoming increasingly difficult to design. The fabrication is also becoming increasingly difficult and expensive. In addition, the number of electrons either accessed or utilized within a device is decreasing, with increasing statistical fluctuations in the electrical properties. In the limit, device operation depends on a single electron, and traditional device concepts must change.
Molecular electronics has the potential to augment or even replace conventional devices with electronic elements, can be altered by externally applied voltages, and have the potential to scale from micron-size dimensions to nanometer-scale dimensions with little change in the device concept. The molecular switching elements can be formed by inexpensive solution techniques; see, e.g., C. P. Collier et al, xe2x80x9cElectronically Configurable Molecular-Based Logic Gatesxe2x80x9d, Science, Vol. 285, pp. 391-394 (Jul. 16, 1999) and C. P. Collier et al, xe2x80x9cA [2]Catenane-Based Solid State Electronically Reconfigurable Switchxe2x80x9d, Science, Vol. 289, pp. 1172-1175 (Aug. 18, 2000). The self-assembled switching elements may be integrated on top of a Si integrated circuit so that they can be driven by conventional Si electronics in the underlying substrate. To address the switching elements, interconnections or wires are used.
For nanoscale electronic circuits, it is necessary to invent new materials with the functions envisioned for them and new processes to fabricate them. Nanoscale molecules with special functions can be used as basic elements for nanoscale computing and memory applications.
While self-assembled techniques may be employed and while redox reaction-based molecules may be used, such as rotaxanes, pseudo-rotaxanes, and catenanes, other techniques for assembling the devices and other molecular systems may be employed. An example of such other techniques comprises lithographic techniques adapted to feature sizes in the micrometer-size range, as well as feature sizes in the nanometer-size range. An example of other molecular systems involves electric field induced band gap changes, such as disclosed and claimed in patent application Ser. No. 09/823,195, filed Mar. 29, 2001, which is incorporated herein by reference. Examples of molecules used in the E-field induced band gap change approach include molecules that evidence:
(1) molecular conformation change or an isomerization;
(2) change of extended conjugation via chemical bonding change to change the band gap; or
(3) molecular folding or stretching.
Changing of extended conjugation via chemical bonding change to change the band gap may be accomplished in one of the following ways:
(a) charge separation or recombination accompanied by increasing or decreasing band localization; or
(b) change of extended conjugation via charge separation or recombination and xcfx80-bond breaking or formation.
Molecular electronic devices, comprising crossed wire switches, hold promise for future electronic and computational devices. Thin single or multiple atomic layers can be formed, for example, by Langmuir-Blodgett techniques or self-assembled monolayer on a specific site. A very controlled roughness of the underlying surface is needed to allow optimal LB film formation. A crossed wire switch may comprise two wires, or electrodes, for example, with a molecular switching species between the two electrodes.
A common approach at present to forming one or both of the electrodes in nanoscale devices is the use of shadow masking. However, as is well-known, the resulting feature sizes are quite large, and are unsuitable for sub-micrometer- and nanometer-size devices. Further, edge definition is inherently poor, and the process is not scalable to smaller dimensions.
Thus, a process for defining electrodes is needed that avoids the problems associated with shadow masking and that is scalable to sub-micrometer and nanometer dimensions and provides good edge definition.
In accordance with the present invention, an improved method of fabricating nanometer-scale devices is provided. The method comprises:
(a) providing a substrate having a major surface;
(b) forming a first electrode on the major surface of the substrate;
(c) optionally forming a first insulating layer on a major surface of the first electrode;
(d) forming a layer of a molecular switch material on either the major surface of the first electrode or a major surface of the first insulating layer, if present;
(e) optionally forming a second insulating layer on a major surface of the molecular switch layer; and
(f) forming a layer of a second electrode on a major surface of the molecular switch layer or a major surface of the second insulating layer, if present. The improvement comprises:
(1) employing materials for the first electrode, the first insulating layer, if present, the molecular switch layer, the second insulating layer, if present, and the second electrode that permit photopatterning of the second electrode; and
(2) photopatterning at least the second electrode without adversely affecting the molecular switch layer.
The method of the present invention incorporates known techniques on a smaller scale than previously implemented to provide a way to move away from shadow mask electrodes (many micrometers wide), presently used in nanometer-scale devices, and move to nanometer dimensions. Further, the method of the present invention provides a means to make devices in keeping with conventional device fabrication procedures, for possible future integration with additional circuitry. Finally, the method of the present invention can ensure that there is no additional barrier in the final device structure. For example, one must be very careful to remove any oxide or other contaminants such as resist residue from the lower metal before applying the upper metal if there are two depositions of metal. If there are contaminants or oxide, then another barrier is formed and the device having the structure substrate-electrode-molecule-electrode (S-E-M-E) would instead have the structure substrate-electrode-molecule-electrode-insulator-electode (S-E-M-E-I-E). An extra layer at the surface is of no concern, for probes and bonds will penetrate the layer, but a buried layer will change device characteristics.